Plasma etching or resputtering of a layer of sputtered materials including opaque metal conductor materials may be controlled in a sputter reactor system. In one embodiment, resputtering of a sputter deposited layer is performed after material has been sputtered deposited and while additional material is being sputter deposited onto a substrate. A path positioned within a chamber of the system directs light or other radiation emitted by the plasma to a chamber window or other optical view-port which is protected by a shield against deposition by the conductor material. In one embodiment, the radiation path is folded to reflect plasma light around the chamber shield and through the window to a detector positioned outside the chamber window. Although deposition material may be deposited onto portions of the folded radiation path, in many applications, the deposition material will be sufficiently reflective to permit the emission spectra to be detected by a spectrometer or other suitable detector without significant signal loss. The etching or resputtering may be terminated when the detector detects that an underlying layer has been reached or when some other suitable process point has been reached.
RELATED APPLICATIONS
This application claims the benefit of the U.S. Provisional Application No. 60/410,843 filed Sep. 13, 2002, which is incorporated by reference in entirety.
A method for manufacturing a semiconductor device includes the steps of consecutively depositing a Poly-Si layer, a WN layer and a W layer on a SiO.sub.2 layer, forming a mask pattern on the W layer, selectively etching the W layer by using plasma in a first etching gas having a high etch selectivity ratio between W and WN, selectively etching the WN layer and the Poly-Si layer by using plasma in a second etching gas having a high etch selectivity between WN and Si, and selectively etching the Poly-Si layer 13 by using plasma in a third etching gas having a high etch selectivity between Si and silicon oxide.
A method of forming barrier layers in a via hole extending through an inter-level dielectric layer and including a preformed first barrier coated onto the bottom and sidewalls of the via holes. In a single plasma sputter reactor, a first step sputters the wafer rather than the target with high energy ions to remove the barrier layer from the bottom of the via but not from the sidewalls and a second step sputter deposits a second barrier layer, for example of Ta/TaN, onto the via bottom and sidewalls. The two steps may be differentiated by power applied to the target, by chamber pressure, or by wafer bias. The second step may include the simultaneous removal of the first barrier layer from the via bottom and sputter deposition of the second barrier layer onto the via sidewalls.
Disclosed are apparatus and method embodiments for achieving etch and/or deposition selectivity in vias and trenches of a semiconductor wafer. That is, deposition coverage in the bottom of each via of a semiconductor wafer differs from the coverage in the bottom of each trench of such wafer. The selectivity may be configured so as to result in punch through in each via without damaging the dielectric material at the bottom of each trench or the like. In this configuration, the coverage amount deposited in each trench is greater than the coverage amount deposited in each via.
