A low-noise output buffer for a digital signal is based on an analog amplifier having bandwidth greater than the switching rate of the digital logic signal. A converter circuit converts the digital logic signal to a ramp signal provided as an input to the analog amplifier. The ramp signal has a slope determined by a bias current and an input capacitance of the analog amplifier. The bias current is generated by a bias circuit such that the bias current varies as the input capacitance of the analog amplifier varies due to variations in the manufacturing process. Therefore, the slope of the ramp signal remains substantially constant despite the variations in the manufacturing process. In particular, the slope of the ramp signal is not undesirably steep even when the buffer is made by a worst-case "strong" process.
CROSS REFERENCE TO RELATED APPLICATIONS
This application claims priority under 35 U.S.C. .sctn.119(e) of U.S. Provisional Patent Application No. 60/525,712 filed Nov. 28, 2003 and entitled "Low Noise Output Buffer", the disclosure of which is hereby incorporated by reference herein.
