A reference voltage generating circuit includes a current mirror circuit having first and second current paths formed between a first power source terminal and a second power source terminal in which the current mirror circuit is operated in response to a voltage level of the second current path, a reference voltage output node for providing a reference voltage and being located on the second current path, an active resistance device formed on the first current path to be operated in a linear region of a current-voltage characteristic curve of the active resistance device, and a voltage supply circuit for supplying the active resistance device with an enable voltage to control the active resistance device to be operated in the linear region.
According to an embodiment of the invention, a method and apparatus for DC voltage conversion are described. According to one embodiment, a voltage converter comprises a current mirror, the current mirror being coupled with a power source; a first transistor device coupled with a bias generator to receive a bias voltage; a second transistor device coupled between the current mirror and the first transistor device; and an output transistor device, a gate of the output transistor device being coupled with a gate of the second transistor device and to the current mirror.
A digital multilevel memory system includes a charge pump and a voltage regulator for generating regulated high voltages for various memory operations. The charge pump may include a plurality of boost circuits to boost the output of the charge pump during a fast start up. Afterwards, the boost circuits are disabled to allow the charge pump to generate high voltages without boosting. The boost circuits may be successively enabled to boost the voltage. The boost circuits may be loadless. The voltage regulator may operate in an open loop and may include a resistive divider as a reference voltage for regulating the high voltage from the charge pump. The charge pump may include spread spectrum pump clocking to reduce electromagnetic inference for capacitor or inductor on-chip charge pumping.
A circuit for generating a reference current, comprising a positive feedback loop, a negative feedback loop, and a floating current mirror coupled to the positive feedback loop. The negative feedback loop may operate to divert current directly from the floating mirror, and may also operate to divert current from the floating mirror by using a voltage follower. The circuit may operate with a minimum supply voltage of approximately the sum of the threshold voltage of a transistor plus three drain saturation voltages, in one example.
