A method for caching specified data in an n-way set associative memory with a copy-back update policy consists of the following steps. First, a row of the associative memory, organized as a plurality of rows and having n ways per row, is selected according to the main memory address of the specified data. The main memory provides primary storage for the data being cached. If one of the ways of the selected row holds invalid data, the specified data is cached in the way holding the invalid data and the data caching process is discontinued. If all n ways of the selected row hold valid data, the following steps are performed. First, a replacement strategy is used to select a way from the selected row. If the way selected in accordance with the replacement strategy holds unmodified data, the specified data is cached in the way selected by the replacement strategy and the data caching process is discontinued. However, if the way selected by the replacement strategy holds modified data, the ways of the selected row are examined again to find a way that holds data from the currently open page of the main memory. If such at least one such way is found, the specified data is cached in one of the ways holding data from the open page, and the data caching process is discontinued. Finally, if none of the ways in the selected row meet the above criteria, the specified data is cached in the way previously selected by the replacement algorithm, and the method terminates.
In an associative memory, when a reference data having the minimum distance with respect to an input data is detected as winner, it is determined whether or not a distance between the input data and winner is less than a threshold value. If the distance is less than the threshold value, it is determined that the reference data detected as winner matches with the input data, and then, a rank of the reference data is improved. If the distance is more than the threshold value, it is determined that the reference data is data different from the input data, and then, the input data is written as new reference data to the associative memory and replaces the reference data with the lowest rank. The upper positions of rank form as a long-term memory, and the lower positions thereof form as a short-term memory.
A cache memory having valid bits, where a circuit configuration in a memory cell of a valid bit is improved so as to perform invalidation at high speed. The invention provides a cache memory including a memory cell that has a function to perform invalidation at high speed. One mode of the invention is a semiconductor device including a memory cell of a valid bit, where two inverters are connected in series to form a loop, a drain of an N-channel transistor is connected to an output signal line of one of the inverters, a gate thereof is connected to a reset signal line of a CPU, and a source thereof is connected to a ground line. The initial value of the memory cell is determined by inputting a reset signal of the CPU to the gate.
A set associative cache includes a plurality of sets, where each set has a plurality of ways. The set associative cache has a plurality of replacement pointers where each set of the plurality of sets has a corresponding replacement pointer within the plurality of replacement pointers, and the corresponding replacement pointer indicates a way of the set. A cache command is provided which specifies a set of the plurality of sets and which specifies a replacement way value. In response to the cache command, a current way value of the replacement pointer corresponding to the specified set is replaced with the replacement way value. The cache may further include way locking control circuitry which indicates whether or not one or more ways is locked. By indicating a locked way with the replacement way value, a locked way can be overridden and thus be used for a subsequent cache line fill.
A storage controller for a host device comprises a control module that receives data storing and data retrieving requests from the host device. A disk drive that is controlled by the control module and that selectively stores user data received from the control module and selectively retrieves the user data for the control module. Non-volatile semiconductor memory is controlled by the control module and selectively stores user data received from the control module and selectively retrieves the user data for the control module. The control module selects at least one of the disk drive and the non-volatile semiconductor memory for storage and retrieval of the user data.
