An imaging architecture is provided employing CMOS imaging sensors. The imaging architecture utilizes time domain sampling techniques to extract image data from a photodiode (PD) pixel array. The CMOS imaging architecture associates time index values with firing of CMOS imaging sensors in response to a capture of an image. The time index values correspond to the brightness of the illumination received by the CMOS imaging sensor. The time index value associated with the firing of the CMOS imaging sensor can be stored and employed in reconstruction of the image. The imaging architecture includes systems and methods for reading and compressing imaging data extracted from the PD pixel array.
CROSS REFERENCE TO RELATED APPLICATIONS
The present application claims the benefit of U.S. Provisional Patent Application Ser. No. 60/335,221, filed Oct. 24, 2001, ADAPTIVE RELATIVE AND ABSOLUTE ADDRESS CODING CMOS IMAGER TECHNIQUE AND SYSTEM ARCHITECTURE, and which is incorporated herein by reference.
The image sensing device provides a digital output for each pixel. As charge builds up in a pixel, the pixel output increases until it reaches a reference level. When the reference level is crossed the pixel is reset. This process is repeated several times in a given frame time cycle with the reference level steadily decreasing. The various reset times represent the light intensity on the pixel. For an image sensor array, the array is scanned multiple times during one image frame time cycle and the reference level is lowered each scan. This provides an image sensor that has built-in pixel non-uniformity suppression, digital output, and high sensitivity.
