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DBG system and method with adhesive layer severing
   
Document Number
US Patent 7074695
Issued Date
July 11, 2006
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Abstract
An array of grooves (23) is formed in a first side (12) of a wafer (10) during a wafer processing method. A back grinding tape (16) is adhered to the first side. An amount of material is removed from the second side (20) of the wafer. An adhesive layer (30) is applied to the second side. Dicing tape (24) is applied to the adhesive layer to create a first wafer assembly (32). The first wafer assembly is supported on a support surface (34) with the dicing tape facing the support surface and the back grinding tape exposed. The back grinding tape is removed and the adhesive layer is severed through the array of grooves to create individually removable die (28).
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Number of Claims:
14
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Owner
ChipPAC, Inc. (Fremont, CA)
Published
July 11, 2006
Application Number
10/959,713
Filed
October 6, 2004
US Classification
438/460   438/33 438/68
Int'l Classification
H01L   21/46   (20060101)  
Examiner
Assistant Examiner
Parent Case
CROSS-REFERENCE TO RELATED APPLICATIONS This application claims priority from U.S. Provisional Application No. 60/549,332, filed Mar. 2, 2004, titled "Substrate processing system and method".
USPTO Field of Search
438/33   438/68   438/107   438/113   438/460   438/462   438/464  
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