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Method of controlling access to an address translation data structure of a computer system
   
Document Number
US Patent 7082507
Issued Date
July 25, 2006
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Abstract
A method of controlling access to an address translation data structure of a computer system. The computer system includes a processor having a normal execution mode and a secure execution mode. The method includes executing code and generating a linear address. During translation of the linear address into a physical address, the method also includes generating a read-only page fault exception during the normal execution mode in response to detecting a software invoked write access to an address translation data structure having a read/write attribute set to be read-only. The method further includes selectively generating either the read-only page fault exception or a security exception during the secure execution mode in response to detecting the software invoked write access.
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Method of controlling access to an address translation data structure of a computer system - US Patent 7082507 Drawing
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Number of Claims:
34
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Owner
Published
July 25, 2006
Application Number
10/419,086
Filed
April 18, 2003
US Classification
711/163  
Int'l Classification
G06F   12/14   (20060101)  
Examiner
Parent Case
This application claims the benefit of U.S. Provisional Application No. 60/373,571 filed Apr. 18, 2002.
USPTO Field of Search
711/163   711/206   711/207  
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