The present invention relates to a digital signal processing apparatus comprising a plurality of available hardware resource means and a first instruction set means having access to said available hardware resource means, so that at least a part of said hardware resource means execute operations under control of said first instruction set means, and further comprising a second instruction set means having access to only a predetermined limited subset of said plurality of available hardware resource means, so that at least a part of said predetermined limited subset of said hardware resource means execute operations under control of said second instruction set means. Further, the present invention relates to a method for processing digital signals in a digital signal processing apparatus comprising a plurality of available hardware resource means, wherein at least a part of said hardware resource means execute operations under control of a first instruction set, and wherein at least a part of a predetermined limited subset of said plurality of available hardware resource means execute operations under control of a second instruction set having access to only said predetermined limited subset of said hardware resource means.
The capability to handle the 100 .mu.s RPR interrupt and similar interrupts is provided by servicing selected interrupts outside of the operating system. This drastically reduces the latency and overhead associated with servicing the interrupt. A method of handling an interrupt in a computer system comprises receiving the interrupt at the computer system, determining whether the interrupt is a selected interrupt, and performing interrupt processing not involving an operating system of the computer system, if the interrupt is a selected interrupt.
