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CMOS image sensor using shared transistors between pixels with dual pinned photodiode
   
Document Number
US Patent 7087883
Issued Date
August 8, 2006
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Inventors
He; Xinping (San Jose, CA)
Yang; Hongli (Cupertino, CA)
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Abstract
A CMOS image sensor that has reduced transistor count is disclosed. The individual pixels are formed by a pinned photodiode and a transfer transistor. An output node receives the signal from the photodiode via the transfer transistor. The output node is shared between multiple pixels. Further, a reset transistor is coupled between a selectable low voltage rail V.sub.ss or a high voltage reference V.sub.ref and the output node. The gate of an output transistor is then coupled to the output node. Both the reset transistor and output transistors are shared between multiple pixels.
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Number of Claims:
13
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Owner
Published
August 8, 2006
Application Number
10/771,839
Filed
February 4, 2004
US Classification
250/214R   250/208.1
Int'l Classification
H01J   40/14   (20060101)  
Examiner
Attorney/Law Firm
USPTO Field of Search
250/214R   250/208.1  
Related Patents
7427734 - Multiple photosensor pixel - Owned by Digital Imaging Systems GmbH (Kirchheim/Teck-Nabern,DE)

A multiple photosensor pixel image sensor sense differentiated color components of light. The multiple photosensor pixel image sensor has a plurality of photo-sensing devices formed with the surface of the substrate. Each photo-sensing device has a structure adjusted to convert photons of the light to photoelectrons representative of a magnitude of the color component of the light for which the structure of the photo-sensing device is adjusted. Each multiple photosensor pixel image sensor includes at least one storage node to selectively receive photoelectrons from each photo-sensing device and triggering switches connected to selectively and sequentially transfer the photoelectrons from each of the plurality of photo-sensing devices to the storage node. At least one reset triggering switch is connected to the one storage node to place the storage node to a reset voltage level after integration and sensing of the photoelectrons.

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