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Amplification device with a bias circuit
   
Document Number
US Patent 7119622
Issued Date
October 10, 2006
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Abstract
An operational amplifier amplifies a signal received through its input terminal connected directly to a piezoelectric device. A bias voltage generating section includes a voltage divider between the power supply terminal and the ground terminal. The drain and source of a p-channel MOSFET are connected to the input terminal of the operational amplifier and the ground terminal. Since the voltage divider applies a bias voltage to the gate and the backgate, the p-channel MOSFET maintains the OFF state. Since a drain-backgate parasitic diode clamps the drain potential to the bias voltage, the bias voltage is applied to the input terminal of the operational amplifier. Then, the drain-backgate resistance is extremely high. The p-channel MOSFET is embedded on a substrate together with other circuits of the amplification device. Thus, the amplification device with an extremely high input impedance is configured as a single integrated circuit.
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Number of Claims:
5
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Published
October 10, 2006
Application Number
11/006,970
Filed
December 8, 2004
US Classification
330/296  
Int'l Classification
H03F   3/16   (20060101)  
Priority Data
Dec 18, 2003 [JP] 2003-421160
USPTO Field of Search
330/296  
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