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Portable electric device with power failure recovery and operation method thereof
   
Document Number
US Patent 7127228
Issued Date
October 24, 2006
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Inventors
Fan; Chen-Huang (MaioLee Hsien,TW)
Du; Ben-Chuan (Taipei Hsien,TW)
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Abstract
A portable electronic device with power failure recovery, powered by a main power source, the device comprising a power detection module, a processor, a timing unit and a power management unit. The power detection module detects an output characteristic from the main power source and asserts an interrupt signal if the characteristic is below a threshold value. The processor asserts a turn-off signal and an enable signal in response to the interrupt signal. The timing unit asserts a notification signal at a predetermined time interval when the enable signal is asserted. Upon receipt of the turn-off signal, the power management unit disconnects the main power source from a circuit block. Moreover, the power management unit reconnects the main power source to the circuit block when the notification signal is asserted and the output characteristic of the main power source is beyond the threshold value.
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Number of Claims:
21
Comments:
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Published
October 24, 2006
Application Number
10/014,260
Filed
December 7, 2001
US Classification
455/343.1   455/127.1 455/343.5 455/343.6 455/572 455/573 455/574
Int'l Classification
H04B   1/16   (20060101)   H04B   1/034   (20060101)   H04B   1/38   (20060101)  
Examiner
Attorney/Law Firm
USPTO Field of Search
455/343.1   455/343.5   455/346.6   455/572   455/573   455/574   455/127.1  
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7577858 - Method for reducing power consumption in a state retaining circuit, state retaining circuit and electronic device - Owned by NXP B.V. (Eindhoven,NL)

A method for reducing the power consumption in a state retaining circuit during a standby mode is disclosed comprising, in an active state, providing a regular power supply (VDD) and a standby power supply (VDD STANDBY) to the state retaining circuit; for a transition from an active state to a standby state, decreasing the regular power supply to ground level and maintaining the standby power supply (VDD STANDBY) thus providing the circuit elements (36, 142, 78, 85) of the state retaining circuit with enough power for retaining the state during standby mode; and for a transition from the standby state to the active state, increasing the regular power supply (VDD) from its ground level to its active level. A circuit for reducing the power consumption in a state retaining circuit during a standby mode is disclosed comprising a control unit (1) providing at least one control signal; a data input unit (3) providing at least one input signal; a data output unit (7) providing at least one output signal; a data storage unit (5) for holding the state of the circuit during an a standby mode; a regular power supply supplying power to the data storage unit (5) during an active mode; and a standby power supply supplying power to at least a part of the data storage unit (5) during the active mode and the standby mode.

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Description
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