A power amplifier circuit including a first transistor, a second transistor, and a power control circuit. The first transistor includes a first input and a first output. The second transistor includes a second input coupled in series with the first output of the first transistor. The input circuit is coupled to the second input of the second transistor. The control circuit includes a time delay circuit and a variable source.
CROSS REFERENCE TO RELATED APPLICATIONS
This application claims priority from U.S. Provisional Patent Application No. 60/463,955 filed on Apr. 18, 2003 and entitled "Systems and Methods for Ramping Power Amplifier Output Power," which is incorporated herein by reference in its entirety.
