A method of forming bumped substrates with protuberances for inverted or flip-connection bonding of electronic devices including semiconductor devices, integrated circuits, and/or application specific integrated circuits and electromechanical devices. The substrates are high temperature insulating materials provided with a conductive pattern. The conductive pattern has contact areas corresponding to the input/output (I/O) pads of the electronic device. A metal is applied over the contact areas, and the temperature is raised above the melting point of the metal causing the metal to melt and draw back into a convex protuberance over the contact areas. The convex protuberances are suitable for connecting to the electronic devices by conductive adhesive bonding or metallurgically bonding such as thermocompression, thermosonic or ultrasonic bonding.
This application is a continuation of U.S. patent application Ser. No. 09/737,408, filed Dec. 15, 2000, now U.S. Pat. No. 6,613,605, which claims the benefit of Provisional Application No. 60/170,976 filed Dec. 15, 1999, and also of Provisional Application No. 60/170,975 filed Dec. 15, 1999, all of which are hereby incorporated by reference.
Various integrated circuit package elements are provided. In one aspect, an integrated circuit package device is provided that includes a lid for covering an integrated circuit. The lid has a convex surface for applying pressure on the integrated circuit when the lid is placed in a selected position. In another aspect, an integrated circuit package device is provided that includes a lid that has a surface for applying pressure to an integrated circuit when the lid is in a selected position. A gold film is coupled to the surface. The gold film has a periphery and a plurality of rounds extending from the periphery.
