It is aimed at decreasing losses not only in a synchronous rectifier circuit provided at a secondary side of a DC-DC converter, but also in a full-bridge switching circuit provided at a primary side thereof. The DC-DC converter comprises a transformer for voltage conversion, a synchronous rectifier circuit at the secondary side, and a full-bridge switching circuit at the primary side. The DC-DC converter performs synchronous rectifier control which uses switch transistors to change paths of currents flowing through the secondary coil in synchronization with switching operations at the primary side. The DC-DC converter detects currents flowing through a load at the secondary side, primary-side currents varying with the load currents, or primary-side input voltages to dynamically control off-timings of a synchronous rectification transistor at the secondary side. In addition, the DC-DC converter detects primary-side input voltages and currents flowing through the secondary-side load to dynamically control on-timings of a transistor in the primary-side switching circuit.
A timing control circuit (70) generates staggered signals from a pulse width modulated signal (68) providing lossless switching in a DC to DC power converter (10). The DC to DC power converter (10) comprises two input MOSFET switches (22, 28) coupled to primary windings (34) of an isolation transformer (36) and two output MOSFET switches (38, 50) coupled to secondary windings (48) of the isolation transformer. The timing circuit (70) comprises an input terminal (90) for receiving a pulse width modulated signal (68) that switches low at time t1 and high at time t4. A first timing output signal circuit (92) is responsive to the pulse width modulated signal (68) and provides a first timing output signal (72) that switches low at time t1 and high at time t7 to control one of the input MOSFET switches (22). A second timing output signal circuit (94) is responsive to the pulse width modulated signal (68) and provides a second timing output signal (76) that switches high at time t3 and low at time t6 to control the other input MOSFET switch (28). A third timing output signal circuit (96) is responsive to the pulse width modulated signal (68) and provides a third timing output signal (82) that switches low at time t2 and high at time t5 to control one of the output MOSFET switches (50). A fourth timing output signal circuit (98) is responsive to the pulse width modulated signal (68) and provides a fourth timing output signal (86) that switches high at time t2 and low at time t8 to control the other of the output MOSFET switches (38). The times t1 through t8 occur in sequence.
A circuit for controlling the operation of synchronous rectifiers. The circuit delays the turn-off of the synchronous rectifiers in accordance with the load current. The magnitude of the load current is examined to determine which of a plurality of delay elements is selected to delay turn-off of the synchronous rectifiers. Delay is accomplished by holding up for a predetermined time period one of a plurality of control signals utilized to determine when the synchronous rectifier should be turned-off.
