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Via recess in underlying conductive line
   
Document Number
US Patent 7180193
Issued Date
February 20, 2007
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Abstract
A semiconductor device includes a dielectric layer, a conductive line, a via, and a via recess in the conductive line. The conductive line is underlying the dielectric layer. The via is formed in the dielectric layer and extends into the conductive line to form the via recess in the conductive line. The via recess formed in the conductive line has a depth of at least about 100 angstroms. Via-fill material fills the via recess and at least partially fills the via, such that the via-fill material is electrically connected to the conductive line. The via recess may have a same size or smaller cross-section area than that of the via, for example. Such via structure may be part of a dual damascene structure in an intermetal dielectric structure, for example.
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Number of Claims:
27
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Published
February 20, 2007
Application Number
10/823,159
Filed
April 13, 2004
US Classification
257/774   257/751 257/760 257/E21.579 257/E23.145 257/E23.158 257/E23.161 257/E23.167
Int'l Classification
H01L   23/522   (20060101)  
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USPTO Field of Search
257/750   257/751   257/752   257/753   257/754   257/755   257/756   257/757   257/758   257/759   257/760   257/761   257/762   257/763   257/764   257/765   257/766   257/774   257/E23.145  
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