A constant-voltage circuit includes a first transistor, a first control circuit, and a second control circuit having a second transistor and a differential amplifier. The first transistor controls an output current according to a first control signal output by the first control circuit such that an output voltage is substantially equal to a predetermined voltage. The second control circuit has a response property faster than the first control circuit to a variation of the output voltage, and causes the first transistor to increase the output current for a predetermined time period, regardless of the first control signal, when the output voltage varied to an extent greater than a predetermined output voltage variation value. The second transistor controls an operation of the first transistor according to a second control signal output by the differential amplifier such that a voltage at an inverting input terminal is substantially equal to the bias voltage.
A transistor drive circuit, a constant voltage circuit, and a method thereof provided with a reference voltage generator, a power voltage detector, and a plurality of error amplifying circuits. The plurality of error amplifying circuits have different operational characteristics. One of the error amplifying circuits is selectively activated in response to a control signal in accordance with an operational mode selected. A reference voltage produced by the reference voltage generator or a divided voltage produced by the power voltage detector is also changed in response to the control signal suitably for each one of the plurality of error amplifying circuits which is selectively activated so as to control the power voltage generated by a power transistor to output a constant power voltage.
A constant voltage circuit which is capable of quickly responding to a sudden change of an output voltage includes an output transistor, and first and second error amplifiers. The output transistor outputs a power with an output voltage and an output current to a load. The first error amplifier is configured to increase a response speed with respect to changes of the output voltage in accordance with an increase of the output current so as to control operations of the output transistor. The second error amplifier has a response speed faster than the first error amplifier with respect to changes of the output voltage, and is configured to decrease a gain thereof in response to a drain current of the output transistor.
