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AND circuit
 
   
Document Number
US Patent 7205796
Issued Date
April 17, 2007
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Abstract
An AND circuit is provided, which has a first differential pair including a first transistor and a second transistor, to which a first input differential signal is inputted, a second differential pair including a third transistor and a fourth transistor, to which a fixed bias is inputted, a third differential pair including a fifth transistor and a sixth transistor, to which a second input differential signal is inputted, and in which the first differential pair is connected to the fifth transistor and the second differential pair is connected to the sixth transistor, and an output terminal, which is connected to the first or second transistor and outputs an AND signal or a NAND signal of the first and second input differential signals.
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Number of Claims:
18
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Owner
Fujitsu Limited (Kawasaki,JP)
Published
April 17, 2007
Application Number
11/045,475
Filed
January 31, 2005
US Classification
326/115   326/119
Int'l Classification
H03K   19/20   (20060101)  
Examiner
Attorney/Law Firm
Priority Data
Sep 17, 2004 [JP] 2004-271782
USPTO Field of Search
326/104   326/109   326/112   326/115   326/119   326/121   326/124   326/125   326/126   326/127  
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A low-power multi-level pulse amplitude modulation (PAM) driver, and a semiconductor device having the same, in which the multi (M)-level PAM driver includes a load unit, first and second current sources, a pair of first input transistors, a pair of second input transistors, and a current source controller, where M is an integer greater than 3. The load unit is electrically connected to an output terminal, and the first and second current sources respectively supply a first amount of current and a second amount of current to the load unit. The pair of first input transistors electrically connects the first current source and the load unit in response to a first bit signal, and the pair of the second input transistors electrically connects the second current source and the load unit in response to a second bit signal. The current source controller activates or deactivates one of the first and second current sources in response to the first and second bit signals. Accordingly, current sources for a multi-level PAM driver are selectively activated or deactivated, thereby minimizing power consumption in the multi-level PAM driver.

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Description
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