There is provided a semiconductor device including a substrate, a device isolation insulating film formed on the substrate, a gate electrode formed on the substrate, a gate wiring layer formed in the device isolation insulating film and connected to the gate electrode, source and drain electrodes arranged on the substrate to face each other via the gate electrode, and an insulating film covering bottom and side surfaces of each of the gate electrode and the gate wiring layer, wherein the gate, source and drain electrodes and gate wiring layer have upper surface levels equal to or lower than that of the device isolation insulating film.
A semiconductor device includes an element isolation insulating film provided in a semiconductor substrate between first and second element regions, a gate electrode running over the element isolation insulating film, first and second element regions, a first stopper film formed on the gate electrode and first element region to cover the first element region and giving a tensile stress, a second stopper film formed on the gate electrode and second element region to cover the second element region and giving a compressive stress, and a contact connected to the gate electrode on the element isolation insulating film. The first and second stopper films overlap each other at least partially on the element isolation insulating film, and a total thickness of the first and second stopper films on the gate electrode on the element isolation insulating film is smaller than a total thickness outside the gate electrode.
