A circuit includes a decoder for receiving an address within an address space of a processor and for accessing a pixel in an active pixel sensor array based on the address. The decoder maps the active pixel sensor array to the address space. The circuit can also provide sequencing of these addresses such that a group of pixels can be read out without additional addressing from a processor. There is also provided a method of processing pixel imperfections in real time. Pixel integration can be programmed on any single pixel or group of pixels in the array as well as windowed readout. A method of target discrimination is also disclosed.
CROSS-REFERENCE TO RELATED APPLICATIONS
The present application is claiming priority of U.S. Provisional Patent Application Ser. No. 60/444,436, filed on Feb. 3, 2003, the content of which is herein incorporated by reference.
There are many, many inventions described herein. In one aspect, what is disclosed is a digital camera including a plurality of arrays of photo detectors, including a first array of photo detectors to sample an intensity of light of a first wavelength and a second array of photo detectors to sample an intensity of light of a second wavelength. The digital camera further may also include a first lens disposed in an optical path of the first array of photo detectors, wherein the first lens includes a predetermined optical response to the light of the first wavelength, and a second lens disposed in with an optical path of the second array of photo detectors wherein the second lens includes a predetermined optical response to the light of the second wavelength. In addition, the digital camera may include signal processing circuitry, coupled to the first and second arrays of photo detectors, to generate a composite image using (i) data which is representative of the intensity of light sampled by the first array of photo detectors, and (ii) data which is representative of the intensity of light sampled by the second array of photo detectors; wherein the first array of photo detectors, the second array of photo detectors, and the signal processing circuitry are integrated on or in the same semiconductor substrate.
