A cache may be programmed to disable one or more entries from allocation for storing memory data (e.g. in response to a memory transaction which misses the cache). Furthermore, the cache may be programmed to select which entries of the cache are disabled from allocation. Since the disabled entries are not allocated to store memory data, the data stored in the entries at the time the cache is programmed to disable the entries may remain in the cache. In one specific implementation, the cache also provides for direct access to entries in response to direct access transactions.
PRIORITY INFORMATION
This application is a continuation of and claims priority to U.S. patent application having an application Ser. No. 09/633,683; filed Aug. 7, 2000 now U.S. Pat. No. 6,848,024, which application is hereby incorporated by reference.
