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Wafer flatness evaluation method, wafer flatness evaluation apparatus carrying out the evaluation method, wafer manufacturing method using the evaluation method, wafer quality assurance method using the evaluation method, semiconductor device manufacturing method using the evaluation method and semiconductor device manufacturing method using a wafer evaluated by the evaluation method
   
Document Number
US Patent 7230680
Issued Date
June 12, 2007
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Abstract
There is disclosed a wafer flatness evaluation method includes measuring front and rear surface shapes of a wafer. The wafer front surface measured is divided into sites. Then, a flatness calculating method is selected according to a position of the site to be evaluated and flatness in the wafer surface is acquired.
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Number of Claims:
20
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Published
June 12, 2007
Application Number
10/739,275
Filed
December 19, 2003
US Classification
355/72   355/53
Int'l Classification
G03B   27/58   (20060101)   G03B   27/42   (20060101)  
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Priority Data
Dec 20, 2002 [JP] 2002-370502
USPTO Field of Search
355/72   355/53   702/167  
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