A low-latency storage memory system is built from multiple memory units such as high-density random access memory. Multiple access ports provide access to memory units and send the resultant data out interface ports. The memory units communicate with the access ports through an interconnected mesh to allow any access port to access any memory unit. An address virtualization mechanism using address translators allows any access port of the memory storage system to access requested data as abstract objects without regard for the physical memory unit that the data is located in, or the absolute memory addresses within that memory unit.
RELATED APPLICATIONS
This application claims the benefit of U.S. Provisional Application No. 60/476,673 entitled "METHODS AND APPARATUS FOR TIME BASED MATERIAL STREAM MANIPULATION," filed on Jun. 6, 2003 and U.S. Provisional Application No. 60/476,705 entitled "METHODS AND APPARATUS FOR IMPLEMENTING A STORAGE MEMORY SYSTEM WITH MULTIPLE ACCESS PORTS AND MEMORY ADDRESS VIRTUALIZATION," also filed on Jun. 6, 2003, the entire teachings of which are incorporated herein by this reference. This application is also related to U.S. patent application Ser. No. 10/730,365 entitled "METHODS AND APPARATUS FOR PROCESSING TIME-BASED CONTENT," filed on the same date as the present application, the entire teachings of which are also incorporated herein by this reference.
