A solid-state image pickup device has a differential output configuration for an output stage thereof and an IC in a next stage has a differential amplifier configuration for an input stage thereof. An output buffer unit buffers and outputs a digital signal from a horizontal bus line. At this time, in addition to the normal video signal, the output buffer unit generates an inverted output of the normal video signal. The normal video signal and the inverted output are outputted from a video signal output terminal and an inverted video signal output terminal, respectively, to the outside of a chip. Further, a clock, which is supplied from a timing generator to the output buffer unit, also is buffered and outputted to the outside together with an inverted clock. A differential amplifier is used in an input stage of an IC in a next stage, whereby even signals having blunter waveforms can be recognized. This enables an increase in the speed of the system, an addition of capacitance to signal paths, or a reduction in size of the output buffer unit of the solid-state image pickup device.
CROSS REFERENCE TO RELATED APPLICATIONS
This application is a continuation of application Ser. No. 10/355,065, filed on Jan. 31, 2003, now U.S. Pat. No. 7,138,617, the entire contents of which are hereby incorporated by reference.
