or
Bookmark and Share
Device for debugging and method thereof
   
Document Number
US Patent 7296185
Issued Date
November 13, 2007
Link
Inventors
Map
Abstract
A debugging device and method are provided, including a central processing unit (CPU) connected to a chipset with a system management interrupt pin. The debugging method includes sending out a system management interrupt signal to central processing unit from the system management interrupt pin of the chipset. Then the CPU moves into a system management mode and pops out a debugging operation window for selecting and executing each debugging item. After the execution of each debugging item is completed, the CPU will leave the debugging operation window and return to the next instruction before debugging. After the execution of each debugging item is completed in the debugging operation window, the CPU will return to the operation system and continue the execution of next instruction before debugging. The execution of debugging will not influence the status and the program execution from the operating system. The disclosed debugging method is convenient for executing each debugging item at any time.
Tags:
Description:
Amusing 0%
Clever 0%
Complex 0%
Efficient 0%
Historic 0%
Important 0%
Innovative 0%
Interesting 0%
Practical 0%
Simple 0%
Number of Claims:
11
Comments:
no comments yet
Owner
Published
November 13, 2007
Application Number
10/820,768
Filed
April 9, 2004
US Classification
714/30   714/31 714/34
Int'l Classification
G06F   11/00   (20060101)  
Attorney/Law Firm
Priority Data
Sep 16, 2003 [TW] 92125534 A
USPTO Field of Search
714/34   714/30   714/31  
Related Patents
Claims
Description
About| FAQs| Terms & Disclaimer| Link to Us| Contact Us