Methods of forming an electronic structure may include forming a seed layer on an electronic substrate, and forming a conductive shunt layer on portions of the seed layer wherein portions of the seed layer are free of the conductive shunt layer. A conductive barrier layer may be formed on the conductive shunt layer opposite the seed layer wherein the conductive shunt layer comprises a first material and wherein the barrier layer comprises a second material different than the first material. Moreover, a solder layer may be formed on the barrier layer opposite the conductive shunt layer wherein the solder layer comprises a third material different than the first and second materials. Related structures are also discussed.
RELATED APPLICATION
This application is a divisional of and claims priority from U.S. application Ser. No. 10/601,938, filed Jun. 23, 2003, now U.S. Pat. No. 6,960,828 which claims priority from U.S. Provisional Patent Application No. 60/391,511 filed on Jun. 25, 2002. The disclosures of application Ser. No. 10/601,938 and of Provisional Application No. 60/391,511 are hereby incorporated herein by reference in their entirety.
