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Electro- and electroless plating of metal in the manufacture of PCRAM devices
   
Document Number
US Patent 7303939
Issued Date
December 4, 2007
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Abstract
Non-volatile, resistance variable memory devices, integrated circuit elements, and methods of forming such devices are provided. According to one embodiment of a method of the invention, a memory device can be fabricated by depositing a chalcogenide material onto a first (lower) electrode, sputter depositing a thin diffusion layer of a conductive material over the chalcogenide material, diffusing metal from the diffusion layer into the chalcogenide material resulting in a metal-comprising resistance variable material, and then plating a conductive material to a desired thickness to form a second (upper) electrode. In another embodiment, the surface of the chalcogenide layer can be treated with an activating agent such as palladium, a conductive metal can be electrolessly plated onto the activated areas to form a thin diffusion layer, metal ions from the diffusion layer can be diffused into the chalogenide material to form a resistance variable material, and a conductive material plated over the resistance variable material to form the upper electrode. The invention provides a process for controlling the diffusion of metal into the chalcogenide material to form a resistance variable material by depositing the mass of the upper electrode by a metal plating technique.
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Number of Claims:
37
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Published
December 4, 2007
Application Number
10/682,700
Filed
October 9, 2003
US Classification
438/95   257/154 257/E31.029 257/E45.002
Int'l Classification
H01L   21/00   (20060101)  
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Parent Case
CROSS-REFERENCE TO RELATED APPLICATIONS This application is a division of U.S. patent application Ser. No. 09/956,783, filed Sep. 20, 2001.
USPTO Field of Search
257/154   257/E31.029   438/95  
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