Provided is an amplifier including a system for controlling output stage quiescent current. The amplifier includes a driving stage including first pmos and nmos transistors coupled together, and an output stage connected to the driving stage. The output stage includes second pmos and nmos transistors coupled together. The amplifier also includes a quiescent control stage connected to the driving stage and including third pmos and nmos transistors coupled together, fourth pmos coupled to third pmos and 4.sup.th nmos coupled to 3.sup.rd nmos. A topology of the coupled third pmos and nmos transistors substantially matches a topology of the coupled first pmos and nmos transistors, and 4.sup.th pmos and nmos match to 2nd pmos and nmos.
CROSS-REFERENCE TO RELATED APPLICATIONS
This application claims the benefit of U.S. Provisional Application No. 60/580,905, filed Jun. 21, 2004, which is incorporated herein by reference.
