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Structure and method for biasing phase change memory array for reliable writing
   
Document Number
US Patent 7307268
Issued Date
December 11, 2007
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Abstract
A memory array having memory cells comprising a diode and a phase change material is reliably programmed by maintaining all unselected memory cells in a reverse biased state. Thus leakage is low and assurance is high that no unselected memory cells are disturbed. In order to avoid disturbing unselected memory cells during sequential writing, previously selected word and bit lines are brought to their unselected voltages before new bit lines and word lines are selected. A modified current mirror structure controls state switching of the phase change material.
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Number of Claims:
10
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Owner
SanDisk Corporation (Milpitas, CA)
Published
December 11, 2007
Application Number
11/040,262
Filed
January 19, 2005
US Classification
257/2   257/3 257/5 257/E27.004 257/E45.002 365/163 365/189.09
Int'l Classification
H01L   47/00   (20060101)  
Examiner
Attorney/Law Firm
USPTO Field of Search
257/2  
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