A method and apparatus for capacitance multiplication using two charge pumps. A first charge pump (206) provides a current signal (I.sub.216) that is first conducted by a resistor (310) of an RC network and then split into three current paths prior to being conducted by a capacitor of the RC network. A first current path provides current to the capacitor (306) of the RC network from node (320). A second current path multiplies the current conducted by capacitor (306) by a first current multiplication factor. A third current path provides current to a second charge pump, which multiplies the current from the first charge pump by a second current multiplication factor that has a fractional value with an inverse magnitude sign relative to the first current multiplication factor. The combination of the second and third current paths effectively multiplies the capacitance magnitude of capacitor (306).
An integrated circuit including a capacitance multiplier having reduced parasitics and injected noise compared to conventional multiplier methods. The integrated circuit includes a reference capacitor and a current mirror arrangement coupled to the reference capacitor. The current mirror arrangement, which includes a current gain factor N, varies the capacitance of the reference capacitor by a factor of N+1, based on the reference capacitor current. The current mirror arrangement includes an operational amplifier operating in conjunction with two mirror transistors to form a current mirror arrangement having little or no series resistance. The current mirror also can include a plurality of resistors configured to reduce the noise from the capacitance multiplier, thus making the capacitance multiplier useful for applications that may require relatively low noise.
