or
Bookmark and Share
Method for fabricating semiconductor device
 
   
Document Number
US Patent 7316973
Issued Date
January 8, 2008
Link
Inventors
Map
Abstract
The present invention relates to a method for fabricating a semiconductor device capable of preventing bridge formation caused by damages to a capacitor oxide structure including a phosphosilicate glass (PSG) layer and a tetraethylorthosilicate (TEOS) layer during a wet cleaning process. The method includes the steps of: forming a PSG layer on a substrate; forming a capping layer on the PSG layer; forming a TEOS layer on the capping layer; selectively etching the TEOS layer, the capping layer and the PSG layer to form a plurality of openings exposing predetermined portions of the substrate; cleaning the openings; forming a conductive layer on the openings; and removing the conductive layer until the TEOS layer is exposed, so that the conductive layer is isolated for each opening.
Tags:
Description:
Amusing 0%
Clever 0%
Complex 0%
Efficient 0%
Historic 0%
Important 0%
Innovative 0%
Interesting 0%
Practical 0%
Simple 0%
Number of Claims:
14
Comments:
no comments yet
Owner
Hynix Semiconductor, Inc. (Kyoungki-Do,KR)
Published
January 8, 2008
Application Number
11/002,706
Filed
December 3, 2004
US Classification
438/675   257/E21.019 257/E21.241 257/E21.576 257/E21.648 438/396 438/763
Int'l Classification
H01L   21/00   (20060101)  
Attorney/Law Firm
Priority Data
Jun 30, 2004 [KR] 10-2004-0050189
USPTO Field of Search
438/675   438/763   438/396  
Related Patents
Claims
Description
About| FAQs| Terms & Disclaimer| Link to Us| Contact Us