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Low complexity block size decision for variable block size motion estimation
   
Document Number
US Patent 7324596
Issued Date
January 29, 2008
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Abstract
An apparatus generally having a first circuit and a second circuit for motion estimation is disclosed. The first circuit may be configured to (i) generate a first motion vector for a block at an integer-pel resolution and (ii) determine a single block size associated with the first motion vector. The second circuit may be configured to (i) generate a plurality of second motion vectors at a sub-pel resolution by searching proximate the first motion vector using the single block size and (ii) determine a motion vector for the block as a particular one of the second motion vectors best matching a plurality of reference samples.
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Number of Claims:
20
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Owner
LSI Logic Corporation (Milpitas, CA)
Published
January 29, 2008
Application Number
10/690,884
Filed
October 22, 2003
US Classification
375/240.16   348/E5.066 375/E7.105
Int'l Classification
H04B   1/66   (20060101)   H04N   11/04   (20060101)   H04N   7/12   (20060101)  
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Parent Case
This application claims the benefit of U.S. Provisional Application No. 60/487,643, filed Jul. 15, 2003, which is hereby incorporated by reference in its entirety. This application is related to co-pending applications Ser. No. 10/669,930, filed Sep. 24, 2003 and Ser. No. 10/682,631, filed Oct. 9, 2003 which are hereby incorporated by reference in their entirety.
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