A synchronous commutation DC-DC converter comprises a current detection transformer (51) for detecting currents (I.sub.Q1, I.sub.Q2) flowing through the primary circuit, first and second DC bias power sources (53, 54) generating bias voltages (V.sub.BS1, V.sub.BS2) larger than the voltage corresponding to the exciting current of a transformer (4), and first and second comparators (55, 57) for driving first and second commutation MOS-FETs (7, 8) when the detection voltage (V.sub.DT) of a current detection resistor (52) exceeds the bias voltages (V.sub.BS1, V.sub.BS2) of the first and second DC bias power sources (53, 54). Since each commutation MOS-FET (7, 8) in the secondary circuit is driven in synchronism with the currents (I.sub.Q1, I.sub.Q2) of the primary circuit from which the exciting current component of the transformer (4) is removed, it is possible to minimize switching loss of each commutation MOS-FET (7, 8) in the secondary circuit and enhance conversion efficiency of the synchronous commutation DC-DC converter.
