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CMOS imager with selectively silicided gates
   
Document Number
US Patent 7348613
Issued Date
March 25, 2008
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Abstract
The invention also relates to an apparatus and method for selectively providing a silicide coating over the transistor gates of a CMOS imager to improve the speed of the transistor gates. The method further includes an apparatus and method for forming a self aligned photo shield over the CMOS imager.
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Number of Claims:
13
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Published
March 25, 2008
Application Number
11/078,709
Filed
March 14, 2005
US Classification
257/292   257/294 257/382 257/E27.131 257/E27.132 257/E27.133
Int'l Classification
H01L   31/062   (20060101)  
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Parent Case
CROSS REFERENCE TO RELATED APPLICATIONS The present application is a continuation application of Ser. No. 10/617,706, filed Jul. 14, 2003, now U.S. Pat. No. 6,930,337, which is a continuation of Ser. No. 09/777,890, filed Feb. 7, 2001, now U.S. Pat. No. 6,611,013, which is a divisional of Ser. No. 09/374,990, filed Aug. 16, 1999, now U.S. Pat. No. 6,333,205, the disclosures of which are incorporated herein by reference in their entireties.
USPTO Field of Search
257/292   257/294   257/382   257/E27.131   257/E27.132  
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