A technique for extending the size of a power transistor beyond one integrated circuit is disclosed. An example apparatus includes a first integrated circuit chip having a first switch, which includes first, second and third terminals. The first integrated circuit chip further includes a first driver circuit having an input and an output. The first integrated circuit chip also has a first control circuit coupled to output a first control signal. A second integrated circuit chip is included, which has a second switch including first, second and third terminals. The second integrated circuit chip also includes a second driver circuit having an input and an output. The second and third terminals of the first switch are coupled to the second and third terminals, respectively, of the second switch. The first driver circuit input and the second driver circuit input are coupled to receive the first control signal. The first driver circuit output is coupled to drive the first terminal of the first switch to switch the first switch with the first control signal. The second driver circuit output is coupled to drive the first terminal of the second switch to switch the second switch with the first control signal.
REFERENCE TO PRIOR APPLICATION
This application is a continuation of U.S. application Ser. No. 11/079,839, filed Mar. 8, 2005, now U.S. Pat. No. 7,038,524, issued on May 2, 2006, which is a continuation of U.S. application Ser. No. 10/441,790, filed May 16, 2003, now U.S. 6,882,212 B2.
