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Signal processor for converting signal
   
Document Number
US Patent 7356263
Issued Date
April 8, 2008
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Abstract
Provided is a signal processor for converting a signal that converts a return to zero (RZ) signal into a non-return to zero (NRZ) signal, in which two 2R (re-amplifying, re-shaping) regenerators are connected in parallel between an input waveguide and an output waveguide with different lengths from each other. The 2R regenerator includes: two semiconductor optical amplifiers having different lengths from each other; and phase control means connected to a short semiconductor optical amplifier. The RZ signal input by a length difference of the waveguide is delayed by a time difference of a half of one bit so that the 2R regenerated NRZ signal can be obtained.
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Number of Claims:
11
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Published
April 8, 2008
Application Number
11/190,755
Filed
July 27, 2005
US Classification
398/176   398/183
Int'l Classification
H04B   10/02   (20060101)  
Examiner
Attorney/Law Firm
Priority Data
Dec 06, 2004 [KR] 10-2004-0101658
USPTO Field of Search
398/175   398/176   398/180   398/183   398/185   398/189   398/190   398/191  
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