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Testing method and testing apparatus
   
Document Number
US Patent 7358714
Issued Date
April 15, 2008
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Abstract
A testing method of a semiconductor integrated circuit device includes a testing step of conducting a functional test by supplying test pattern data to a semiconductor integrated circuit device mounted upon a testing apparatus, and a post processing step conducted after the testing step for continuously driving the semiconductor integrated circuit device by supplying dummy test pattern to the semiconductor integrated circuit device, wherein the test pattern data is supplied with a first system clock speed while the dummy test pattern data is supplied with a second, slower system clock speed, the post processing step switching a system clock speed of the testing apparatus from the first system clock speed to the second system clock speed at the same time as finishing of the testing step.
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Number of Claims:
12
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Owner
Fujitsu Limited (Kawasaki,JP)
Published
April 15, 2008
Application Number
11/334,399
Filed
January 19, 2006
US Classification
324/73.1   324/765
Int'l Classification
G01R   31/28   (20060101)  
Examiner
Assistant Examiner
Attorney/Law Firm
Priority Data
Oct 13, 2005 [JP] 2005-299200
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