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Method for creating a JTAG tap controller in a slice for use during custom instance creation to avoid the need of a boundary scan synthesis tool
   
Document Number
US Patent 7360133
Issued Date
April 15, 2008
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Inventors
Ngo; James (San Jose, CA)
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Abstract
A method and system is provided for creating a tap controller in a slice for use during custom instance creation to avoid the need of a boundary scan synthesis tool. Aspects of the present invention include during slice creation, using a software tool to create a test access port (TAP) from slice resources; during instance creation, allowing a customer to design a custom chip using the software tool to select which structures to use on the slice; and based on the customer selections, reconfiguring at the instance level connections between the tap controller and the selected structures.
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Number of Claims:
24
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Owner
LSI Logic Corporation (Milpitas, CA)
Published
April 15, 2008
Application Number
10/847,691
Filed
May 18, 2004
US Classification
714/726   257/E27.105 703/25
Int'l Classification
G01R   31/3185   (20060101)   G01R   31/316   (20060101)  
Examiner
Assistant Examiner
Attorney/Law Firm
USPTO Field of Search
714/726   714/738   714/733   326/16  
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