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Method of detecting errors in a priority encoder and a content addressable memory adopting the same
   
Document Number
US Patent 7363554
Issued Date
April 22, 2008
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Abstract
A method of detecting errors in a priority encoder and a content addressable memory (CAM) adopting the same are provided. The CAM includes a CAM cell array, a priority encoder, and a shift register unit. The priority encoder tests the CAM cell array to determine if the CAM cell array has errors by comparing search data with data stored in the CAM cell array. The shift register unit, in response to a clock signal, transmits first through m.sup.th test data to the priority encoder to test the priority encoder. Then, the logic levels of the first through m.sup.th test data are sequentially changed in synchronization with the clock signal. If there are no errors in the priority encoder, the priority encoder sequentially outputs word line addresses of a most significant bit through a least significant bit of the CAM cell array.
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Number of Claims:
13
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Published
April 22, 2008
Application Number
10/973,613
Filed
October 26, 2004
US Classification
714/718   365/201
Int'l Classification
G11C   29/00   (20060101)   G11C   7/00   (20060101)  
Examiner
Attorney/Law Firm
Priority Data
Nov 03, 2003 [KR] 10-2003-0077393
USPTO Field of Search
714/718  
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