or
Bookmark and Share
Protected configuration space in a protected environment
   
Document Number
US Patent 7366849
Issued Date
April 29, 2008
Link
Inventors
Map
Abstract
A protected configuration space is implemented as at least one range of memory addresses that are mapped to logic external to system memory. The memory addresses access logic that performs control and status operations pertaining to a protected operating environment. Some of the addresses may access protected configuration registers. Commands having destination addresses within the protected configuration space may not be completed if the commands are not issued by a processor, or if the commands are not part of a group of one or more designated protected commands. A separately addressable non-protected configuration space may also be implemented, accessible by processors, non-processors and/or non-protected commands.
Tags:
Description:
Amusing 0%
Clever 0%
Complex 0%
Efficient 0%
Historic 0%
Important 0%
Innovative 0%
Interesting 0%
Practical 0%
Simple 0%
Number of Claims:
17
Comments:
no comments yet
Owner
Intel Corporation (Santa Clara, CA)
Published
April 29, 2008
Application Number
10/877,582
Filed
June 25, 2004
US Classification
711/152   710/200 711/156 711/E12.093 711/E12.101 726/27
Int'l Classification
G06F   12/14   (20060101)  
Examiner
Assistant Examiner
Parent Case
This application is a continuation of application Ser. No. 10/167,434, entitled "PROTECTED CONFIGURATION SPACE IN A PROTECTED ENVIRONMENT," filed Jun. 12, 2002 now U.S. Pat. No. 6,820,177 and assigned to the corporate assignee of the present invention.
USPTO Field of Search
711/152   711/156   711/163   710/200   710/240   713/200   726/27  
Related Patents
Claims
Description
About| FAQs| Terms & Disclaimer| Link to Us| Contact Us