A memory-logics LSI device forms an input/output path for testing. A memory device has a memory input/output unit,which includes an input/output selector with test function. A test clock signal, which is directly supplied in the test mode, is used to selectively take in one of input signals and an output signal to output the signal. The output is monitored on an external pin, while changing the timing of the positive-going edge of the clock signal, or the input signals. Relative measurement is then made on a delay amount indicating to which extent the input signals are delayedto cause a phase shift with respect to the clock signal,at the timing immediately before input to and after output from the memory device.
