An object of the present invention is to provide a circuit device in which the power consumption can be reduced without the dedicated signal. A circuit device (1) comprising a D flip-flop (F0) for receiving a pulse of a clock signal (CK) to introduce data thereinto and output said introduced data and a shift register (2), comprising the D flip-flops (F1 to F7) for introducing the data thereinto in accordance with the pulse to output the introduced data, for processing the outputted data from the D flip-flop (F0), wherein the circuit device (1) comprises a control circuit (3) for controlling whether the D flip-flops (F1 to F7) are supplied with the pulse of the clock signal (CK) on the basis of outputted data from the D flip-flop (F0) in accordance with the pulse of the clock signal (CK) and data to be introduced into the D flip-flop (F0) in accordance with the next pulse.
An apparatus includes a multi-cycle clock gater and a circuit design updater. The multi-cycle clock gater generates multi-cycle gating groups of data latching devices of a circuit design. The circuit design updater updates the circuit design with selected multi-cycle gating groups. Each gating group is associated with a single gating function. For each gating group, data latching devices of 0.sup.th level of the gating group are gated with the gating function and ith level data latching devices of the gating function are gated with ith latched versions of the gating function.
