An analog-to-digital converter (ADC) exhibiting an uncorrected non-linear transfer function receives measured analog voltage amplitudes and outputs uncorrected digital values. A calibration circuit receives each uncorrected digital value and outputs a corrected digital value. The measured analog voltage amplitudes received by the ADC and the corresponding corrected digital values output by the calibration circuit define points approximating an ideal linear transfer function of the ADC. The calibration circuit performs piecewise-linear approximation of the uncorrected transfer function and associates each uncorrected digital value with one of N linear segments that join at inflection points on the uncorrected transfer function. The inflection points are determined using the second derivative of the uncorrected transfer function. The calibration circuit calculates each corrected digital value using no more than 2N+2 stored calibration coefficients. Calibration coefficients that are not stored in non-volatile memory are calculated upon power up using stored calibration coefficients.
CROSS REFERENCE TO RELATED APPLICATION
This application is a continuation-in-part of, and claims priority under 35 U.S.C. .sctn.120 from, nonprovisional U.S. patent application Ser. No. 11/267,722 entitled "Adaptive Error Correction in an Oversampled ADC," now U.S. Pat. No. 7,085,663, issued Aug. 1, 2006, filed on Nov. 4, 2005, the subject matter of which is incorporated herein by reference application Ser. No. 11/267,722, in turn, is a continuation of U.S. patent application Ser. No. 10/844,901 entitled "Adaptive Error Correction in an Oversampled ADC," now U.S. Pat. No. 6,993,441, filed on May 12, 2004, the subject matter of which is incorporated herein by reference.
