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Non-volatile memory device capable of preventing damage by plasma charge
 
   
Document Number
US Patent 7388240
Issued Date
June 17, 2008
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Abstract
A non-volatile memory device for preventing damage by plasma charges includes a gate electrode formed on a predetermined region of a semiconductor substrate, a source/drain region which is overlapped with the gate electrode and formed in a first well region of the semiconductor substrate, a first metal line coupled to the gate electrode through a first contact plug, a second metal line coupled to the first metal line through a second contact plug so that an external voltage is transferred to the gate electrode, a junction region formed in a second well region separated from the first well region, and a third metal line coupled to the junction region through a third contact plug and coupled to the second metal line through a fourth contact plug.
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Number of Claims:
5
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Owner
Published
June 17, 2008
Application Number
11/405,800
Filed
April 17, 2006
US Classification
257/261   257/328 257/758 257/E21.662 257/E23.145 257/E27.102
Int'l Classification
H01L   29/80   (20060101)  
Examiner
Priority Data
Apr 18, 2005 [KR] 10-2005-0032072
USPTO Field of Search
257/261   257/E23.145  
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