One embodiment of the present invention provides a system that avoids locks by transactionally executing critical sections. During operation, the system receives a program which includes one or more critical sections which are protected by locks. Next, the system modifies the program so that the critical sections which are protected by locks are executed transactionally without acquiring locks associated with the critical sections. More specifically, the program is modified so that: (1) during transactional execution of a critical section, the program first determines if a lock associated with the critical section is held by another process and if so aborts the transactional execution; (2) if the transactional execution of the critical section completes without encountering an interfering data access from another process, the program commits changes made during the transactional execution and optionally resumes normal non-transactional execution of the program past the critical section; and (3) if an interfering data access from another process is encountered during transactional execution of the critical section, the program discards changes made during the transactional execution, and attempts to re-execute the critical section zero or more times.
RELATED APPLICATION
This application is a continuation-in-part of and hereby claims priority under 35 U.S.C. .sctn.120 to a pending U.S. patent application, entitled, "Selectively Unmarking Load-Marked Cache Lines During Transactional Program Execution," by inventors Marc Tremblay, Quinn A. Jacobson, Shailender Chaudhry, Mark S. Moir and Maurice P. Herlihy, Ser. No. 10/764,412, filed 23 Jan. 2004 now U.S. Pat. No. 7,089,374, and hereby claims priority through application Ser. No. 10/764,412 under 35 U.S.C. .sctn.119 to U.S. Provisional Application No. 60/447,128, filed on 13 Feb. 2003, entitled "Transactional Memory," by inventors Shailender Chaudhry, Marc Tremblay, and Quinn A. Jacobson.
