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Isolation of input/output adapter error domains
   
Document Number
US Patent 7398427
Issued Date
July 8, 2008
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Abstract
Method, apparatus and system for isolating input/output adapter error domains in a data processing system. Errors occurring in one input/output adapter are isolated from other input/output adapters of the data processing system by functionality in a host bridge that connects the input/output adapters to a system bus of the data processing system, thus permitting the use of low cost, industry standard switches and bridges external to the host bridge.
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Number of Claims:
3
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Published
July 8, 2008
Application Number
10/887,524
Filed
July 8, 2004
US Classification
714/43   714/56
Int'l Classification
G06F   11/00   (20060101)  
USPTO Field of Search
714/43   714/56  
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