An electronic circuit that includes components that operate asynchronously of one another. An interface element has inputs coupled to a respective one of the components. The interface element supplies a logic output signal that is a logic function of signals at the inputs and dependent on the relative timing of the signals at the inputs. The electronic circuit is switched to a test mode, in which test input signals are applied to the electronic circuit from a test signal source. During test a difference is caused to occur between the time intervals after which the test signal source affects different ones of the signals at the inputs of the interface element. Preferably the test control circuit activates said difference in the test mode and not in the normal operating mode.
