A solid state imager arrangement includes an image area, an output register which receives signal charge from the image area, a separate multiplication register into which signal charge from the output register is transferred, means for obtaining signal charge multiplication by transferring the charge through a sufficiently high field in elements of the multiplication register, and an additional register into which excess signal charge is transferred.
CROSS REFERENCE TO RELATED APPLICATIONS
This application is a continuation-in-part of application Ser. No. 10/622,109, filed Jul. 18, 2003, which is a continuation of International Application No. PCT/GB02/00138, filed Jul. 14, 2002, and claiming priority to British Application GB 0101301.0 filed Jan. 18, 2001, to which the present application also claims priority. The disclosures of the foregoing applications, together with the disclosures of each and every U.S. and foreign patent and patent application mentioned below are incorporated herein by reference in their entirety.
