An indexing system provides a more efficient and effective interface to display and manipulate large amounts of trace data from computer data and storage networks that is captured and stored in the trace memory of a protocol analyzer. An index of the trace data in the trace memory is generated by reading a selected percentage of the trace data in the trace memory. Hardware circuitry selectively identifies locations in the trace memory of trace data for desired portions of the trace data. A processor utilizes the locations identified by the hardware circuitry to generate an index for the trace data stored in the trace memory. Preferably, the hardware circuitry searches for a first time stamp encountered in each of a series of blocks of trace data and the processor utilizes the first time stamps to build a time index for the series of blocks of trace data.
RELATED APPLICATIONS
The present invention is a continuation of application Ser. No. 09/579,936, filed May 26, 2000 now U.S. Pat. No. 6,745,351, entitled, "INDEXING SYSTEM FOR PROTOCOL ANALYZERS," which claims priority to a provisional application entitled, "INDEXER AND USER INTERFACE FOR FIBRE CHANNEL ANALYZERS," filed May 5, 2000, Application No. 60/202,237. The present invention is also related to two commonly assigned patent applications, the first of which is entitled "DEEP TRACE MEMORY SYSTEM FOR A PROTOCOL ANALYZER," filed Nov. 17, 1998, and now issued as U.S. Pat. Nos. 6,266,789 and 6,393,587, and the second of which is entitled "INTEGRATED MULTI-CHANNEL FIBER CHANNEL ANALYZE," filed Apr. 19, 1999, and now issued as U.S. Pat. No. 6,507,923.
