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Processor having content addressable memory for block-based queue structures
   
Document Number
US Patent 7467256
Issued Date
December 16, 2008
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Abstract
Queuing command information is stored in a content addressable memory (CAM) where a queuing command for a first queue is received, the CAM is examined to determine if commands for the first queue are present, and if commands for the first queue were found to be present, information is stored in a linked list for the received command in multiple CAM entries.
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Number of Claims:
16
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Owner
Intel Corporation (Santa Clara, CA)
Published
December 16, 2008
Application Number
11/027,601
Filed
December 28, 2004
US Classification
711/108   365/49.1 710/39 711/154 711/169
Int'l Classification
G06F   12/00   (20060101)  
Examiner
Assistant Examiner
USPTO Field of Search
710/108   711/108  
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