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Providing input signal through a sample and hold circuit with reduced distortion
 
   
Document Number
US Patent 7471222
Issued Date
December 30, 2008
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Abstract
According to an aspect of the present invention, samples of an input signal are provided with reduced distortion, when the input signal is received from a lead terminal offering lead inductance on an input path. Such a feature is achieved by charging a energy storage element to a value proportional to the input signal using a portion of charging energy received through a path having less lead inductance compared to the path connecting the input signal to the energy storage element. Thus, the energy drawn through the lead impedance is reduced, thereby reducing the magnitude of the distortion caused.
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Number of Claims:
13
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Published
December 30, 2008
Application Number
11/560,833
Filed
November 16, 2006
US Classification
341/122   341/155
Int'l Classification
H03M   1/06   (20060101)  
Parent Case
RELATED APPLICATIONS The present application claims priority from U.S. provisional patent application entitled, "Input Sampling Circuit for Switched Capacitor Circuits", Ser. No.: 60/738,763 filed on Nov. 21, 2005, naming as inventors Oswal et al, and is incorporated in its entirety herewith.
USPTO Field of Search
341/122   341/172   341/155  
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